/*
 * This request is for VHDL/Verilog. However it can be implemented in C with similar process.
 * There are some ways to do:
 *  1. Use Verilog/VHDL.
 *  2. Use C with similar process Verilog/VHDL.
 *
 *  3. If request by C, can use 'x mod 5' to check remainer is 0 or not.
 *  4. If request by C, can use 'x / 5', then 'result * 5 != x' or not.
 *  5. If request by C without mod or /, can use 'x - 5' until result < 5 and result 0 or not.
 */


#if 0 /* 1. Use Verilog/VHDL */

/* https://[Log in to view URL] */

/*
 * This request described in case: Data in is serial.
 * In this case, data will input MSB first. The algorithm is
 *  bbbbbbbb -> combine each bit input, if it > 5, it - 5. Continue combine this result with bit data in.
 *                                      if it < 5, continue combine.
 */
process(clk)
begin
    if rising_edge(clk) then
        if rst_n = 0 then
            ret <= 0;
        else
            if (ret & data) >= 5 then
                ret <= (ret & data) - 5;
            else
                ret <= ret & data;
            endif
        endif
    endif
end process

#endif

#if 1 /* 2. Use C with similar process Verilog/VHDL */

/* Include lib */
#include <stdio.h>

/* Define */
#define DIVIDER_NUM     5

/* API to check number divided by predefined number. Return 1: can divide, 0: cannot */
int check_number_divide_number(int x)
{
    int i, cnt = sizeof(x) * 8, tmp = 0;

    for (i = 0; i < cnt; i++) {
        tmp = (tmp << 1) | ((x >> (cnt - 1)) & 0x1);
        x <<= 1;
        if (tmp >= DIVIDER_NUM)
            tmp = tmp - DIVIDER_NUM;
    }
    
    return (tmp ? 0 : 1);
}

/* Main func interract with use */
int main()
{
    int i;
    
    for (i = 0; i < 26; i++) {
        printf("Val %d --> divided by %d: %s\n", i,
               DIVIDER_NUM, check_number_divide_number(i) ? "OK" : "NO");
    }

    return 0;
}

#endif

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